1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
// SPDX-License-Identifier: Apache-2.0 OR MIT

/*
Helper for outline-atomics.

On architectures where DW atomics are not supported on older CPUs, we use
fallback implementation when DW atomic instructions are not supported and
outline-atomics is enabled.

This module provides helpers to implement them.
*/

use core::sync::atomic::Ordering;

#[cfg(any(target_arch = "x86_64", target_arch = "powerpc64", target_arch = "riscv64"))]
pub(crate) type Udw = u128;
#[cfg(any(target_arch = "x86_64", target_arch = "powerpc64", target_arch = "riscv64"))]
pub(crate) type AtomicUdw = super::super::super::fallback::AtomicU128;
#[cfg(any(target_arch = "x86_64", target_arch = "powerpc64", target_arch = "riscv64"))]
pub(crate) type AtomicIdw = super::super::super::fallback::AtomicI128;

#[cfg(any(target_arch = "arm", target_arch = "riscv32"))]
pub(crate) type Udw = u64;
#[cfg(any(target_arch = "arm", target_arch = "riscv32"))]
pub(crate) type AtomicUdw = super::super::super::fallback::AtomicU64;
#[cfg(any(target_arch = "arm", target_arch = "riscv32"))]
pub(crate) type AtomicIdw = super::super::super::fallback::AtomicI64;

// Asserts that the function is called in the correct context.
macro_rules! debug_assert_outline_atomics {
    () => {
        #[cfg(target_arch = "x86_64")]
        {
            debug_assert!(!super::detect::detect().has_cmpxchg16b());
        }
        #[cfg(target_arch = "powerpc64")]
        {
            debug_assert!(!super::detect::detect().has_quadword_atomics());
        }
        #[cfg(any(target_arch = "riscv32", target_arch = "riscv64"))]
        {
            debug_assert!(!super::detect::detect().has_zacas());
        }
        #[cfg(target_arch = "arm")]
        {
            debug_assert!(!super::has_kuser_cmpxchg64());
        }
    };
}

#[cold]
pub(crate) unsafe fn atomic_load(src: *mut Udw, order: Ordering) -> Udw {
    debug_assert_outline_atomics!();
    #[allow(clippy::cast_ptr_alignment)]
    // SAFETY: the caller must uphold the safety contract.
    unsafe {
        (*(src as *const AtomicUdw)).load(order)
    }
}
fn_alias! {
    #[cold]
    pub(crate) unsafe fn(src: *mut Udw) -> Udw;
    // fallback's atomic load has at least acquire semantics.
    #[cfg(not(any(target_arch = "arm", target_arch = "x86_64")))]
    atomic_load_non_seqcst = atomic_load(Ordering::Acquire);
    atomic_load_seqcst = atomic_load(Ordering::SeqCst);
}

#[cfg(not(any(target_arch = "riscv32", target_arch = "riscv64")))]
#[cold]
pub(crate) unsafe fn atomic_store(dst: *mut Udw, val: Udw, order: Ordering) {
    debug_assert_outline_atomics!();
    #[allow(clippy::cast_ptr_alignment)]
    // SAFETY: the caller must uphold the safety contract.
    unsafe {
        (*(dst as *const AtomicUdw)).store(val, order);
    }
}
#[cfg(not(any(target_arch = "riscv32", target_arch = "riscv64")))]
fn_alias! {
    #[cold]
    pub(crate) unsafe fn(dst: *mut Udw, val: Udw);
    // fallback's atomic store has at least release semantics.
    #[cfg(not(target_arch = "arm"))]
    atomic_store_non_seqcst = atomic_store(Ordering::Release);
    atomic_store_seqcst = atomic_store(Ordering::SeqCst);
}

#[cold]
pub(crate) unsafe fn atomic_compare_exchange(
    dst: *mut Udw,
    old: Udw,
    new: Udw,
    success: Ordering,
    failure: Ordering,
) -> (Udw, bool) {
    debug_assert_outline_atomics!();
    #[allow(clippy::cast_ptr_alignment)]
    // SAFETY: the caller must uphold the safety contract.
    unsafe {
        match (*(dst as *const AtomicUdw)).compare_exchange(old, new, success, failure) {
            Ok(v) => (v, true),
            Err(v) => (v, false),
        }
    }
}
fn_alias! {
    #[cold]
    pub(crate) unsafe fn(dst: *mut Udw, old: Udw, new: Udw) -> (Udw, bool);
    // fallback's atomic CAS has at least AcqRel semantics.
    #[cfg(not(any(target_arch = "arm", target_arch = "x86_64")))]
    atomic_compare_exchange_non_seqcst
        = atomic_compare_exchange(Ordering::AcqRel, Ordering::Acquire);
    atomic_compare_exchange_seqcst
        = atomic_compare_exchange(Ordering::SeqCst, Ordering::SeqCst);
}

macro_rules! atomic_rmw_3 {
    (
        $name:ident($atomic_type:ident::$method_name:ident),
        $non_seqcst_alias:ident, $seqcst_alias:ident
    ) => {
        #[cold]
        pub(crate) unsafe fn $name(dst: *mut Udw, val: Udw, order: Ordering) -> Udw {
            debug_assert_outline_atomics!();
            #[allow(
                clippy::as_underscore,
                clippy::cast_possible_wrap,
                clippy::cast_ptr_alignment,
                clippy::cast_sign_loss
            )]
            // SAFETY: the caller must uphold the safety contract.
            unsafe {
                (*(dst as *const $atomic_type)).$method_name(val as _, order) as Udw
            }
        }
        fn_alias! {
            #[cold]
            pub(crate) unsafe fn(dst: *mut Udw, val: Udw) -> Udw;
            // fallback's atomic RMW has at least AcqRel semantics.
            #[cfg(not(any(target_arch = "arm", target_arch = "x86_64")))]
            $non_seqcst_alias = $name(Ordering::AcqRel);
            $seqcst_alias = $name(Ordering::SeqCst);
        }
    };
}
macro_rules! atomic_rmw_2 {
    (
        $name:ident($atomic_type:ident::$method_name:ident),
        $non_seqcst_alias:ident, $seqcst_alias:ident
    ) => {
        #[cold]
        pub(crate) unsafe fn $name(dst: *mut Udw, order: Ordering) -> Udw {
            debug_assert_outline_atomics!();
            #[allow(clippy::cast_ptr_alignment)]
            // SAFETY: the caller must uphold the safety contract.
            unsafe {
                (*(dst as *const $atomic_type)).$method_name(order) as Udw
            }
        }
        fn_alias! {
            #[cold]
            pub(crate) unsafe fn(dst: *mut Udw) -> Udw;
            // fallback's atomic RMW has at least AcqRel semantics.
            #[cfg(not(any(target_arch = "arm", target_arch = "x86_64")))]
            $non_seqcst_alias = $name(Ordering::AcqRel);
            $seqcst_alias = $name(Ordering::SeqCst);
        }
    };
}

atomic_rmw_3!(atomic_swap(AtomicUdw::swap), atomic_swap_non_seqcst, atomic_swap_seqcst);
atomic_rmw_3!(atomic_add(AtomicUdw::fetch_add), atomic_add_non_seqcst, atomic_add_seqcst);
atomic_rmw_3!(atomic_sub(AtomicUdw::fetch_sub), atomic_sub_non_seqcst, atomic_sub_seqcst);
atomic_rmw_3!(atomic_and(AtomicUdw::fetch_and), atomic_and_non_seqcst, atomic_and_seqcst);
atomic_rmw_3!(atomic_nand(AtomicUdw::fetch_nand), atomic_nand_non_seqcst, atomic_nand_seqcst);
atomic_rmw_3!(atomic_or(AtomicUdw::fetch_or), atomic_or_non_seqcst, atomic_or_seqcst);
atomic_rmw_3!(atomic_xor(AtomicUdw::fetch_xor), atomic_xor_non_seqcst, atomic_xor_seqcst);
atomic_rmw_3!(atomic_max(AtomicIdw::fetch_max), atomic_max_non_seqcst, atomic_max_seqcst);
atomic_rmw_3!(atomic_umax(AtomicUdw::fetch_max), atomic_umax_non_seqcst, atomic_umax_seqcst);
atomic_rmw_3!(atomic_min(AtomicIdw::fetch_min), atomic_min_non_seqcst, atomic_min_seqcst);
atomic_rmw_3!(atomic_umin(AtomicUdw::fetch_min), atomic_umin_non_seqcst, atomic_umin_seqcst);

atomic_rmw_2!(atomic_not(AtomicUdw::fetch_not), atomic_not_non_seqcst, atomic_not_seqcst);
atomic_rmw_2!(atomic_neg(AtomicUdw::fetch_neg), atomic_neg_non_seqcst, atomic_neg_seqcst);