wasmparser/
lib.rs

1/* Copyright 2017 Mozilla Foundation
2 *
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 *     http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15
16//! A simple event-driven library for parsing WebAssembly binary files
17//! (or streams).
18//!
19//! The parser library reports events as they happen and only stores
20//! parsing information for a brief period of time, making it very fast
21//! and memory-efficient. The event-driven model, however, has some drawbacks.
22//! If you need random access to the entire WebAssembly data-structure,
23//! this is not the right library for you. You could however, build such
24//! a data-structure using this library.
25
26#![deny(missing_docs)]
27
28/// A helper macro to conveniently iterate over all opcodes recognized by this
29/// crate. This can be used to work with either the [`Operator`] enumeration or
30/// the [`VisitOperator`] trait if your use case uniformly handles all operators
31/// the same way.
32///
33/// It is also possible to specialize handling of operators depending on the
34/// Wasm proposal from which they are originating.
35///
36/// This is an "iterator macro" where this macro is invoked with the name of
37/// another macro, and then that macro is invoked with the list of all
38/// operators. An example invocation of this looks like:
39///
40/// The list of specializable Wasm proposals is as follows:
41///
42/// - `@mvp`: Denoting a Wasm operator from the initial Wasm MVP version.
43/// - `@exceptions`: [Wasm `expection-handling` proposal]
44/// - `@tail_call`: [Wasm `tail-calls` proposal]
45/// - `@reference_types`: [Wasm `reference-types` proposal]
46/// - `@sign_extension`: [Wasm `sign-extension-ops` proposal]
47/// - `@saturating_float_to_int`: [Wasm `non_trapping_float-to-int-conversions` proposal]
48/// - `@bulk_memory `:[Wasm `bulk-memory` proposal]
49/// - `@threads`: [Wasm `threads` proposal]
50/// - `@simd`: [Wasm `simd` proposal]
51/// - `@relaxed_simd`: [Wasm `relaxed-simd` proposal]
52///
53/// [Wasm `expection-handling` proposal]:
54/// https://github.com/WebAssembly/exception-handling
55///
56/// [Wasm `tail-calls` proposal]:
57/// https://github.com/WebAssembly/tail-call
58///
59/// [Wasm `reference-types` proposal]:
60/// https://github.com/WebAssembly/reference-types
61///
62/// [Wasm `sign-extension-ops` proposal]:
63/// https://github.com/WebAssembly/sign-extension-ops
64///
65/// [Wasm `non_trapping_float-to-int-conversions` proposal]:
66/// https://github.com/WebAssembly/nontrapping-float-to-int-conversions
67///
68/// [Wasm `bulk-memory` proposal]:
69/// https://github.com/WebAssembly/bulk-memory-operations
70///
71/// [Wasm `threads` proposal]:
72/// https://github.com/webassembly/threads
73///
74/// [Wasm `simd` proposal]:
75/// https://github.com/webassembly/simd
76///
77/// [Wasm `relaxed-simd` proposal]:
78/// https://github.com/WebAssembly/relaxed-simd
79///
80/// ```
81/// macro_rules! define_visit_operator {
82///     // The outer layer of repetition represents how all operators are
83///     // provided to the macro at the same time.
84///     //
85///     // The `$proposal` identifier indicates the Wasm proposals from which
86///     // the Wasm operator is originating.
87///     // For example to specialize the macro match arm for Wasm SIMD proposal
88///     // operators you could write `@simd` instead of `@$proposal:ident` to
89///     // only catch those operators.
90///     //
91///     // The `$op` name is bound to the `Operator` variant name. The
92///     // payload of the operator is optionally specified (the `$(...)?`
93///     // clause) since not all instructions have payloads. Within the payload
94///     // each argument is named and has its type specified.
95///     //
96///     // The `$visit` name is bound to the corresponding name in the
97///     // `VisitOperator` trait that this corresponds to.
98///     ($( @$proposal:ident $op:ident $({ $($arg:ident: $argty:ty),* })? => $visit:ident)*) => {
99///         $(
100///             fn $visit(&mut self $($(,$arg: $argty)*)?) {
101///                 // do nothing for this example
102///             }
103///         )*
104///     }
105/// }
106///
107/// pub struct VisitAndDoNothing;
108///
109/// impl<'a> wasmparser::VisitOperator<'a> for VisitAndDoNothing {
110///     type Output = ();
111///
112///     wasmparser::for_each_operator!(define_visit_operator);
113/// }
114/// ```
115#[macro_export]
116macro_rules! for_each_operator {
117    ($mac:ident) => {
118        $mac! {
119            @mvp Unreachable => visit_unreachable
120            @mvp Nop => visit_nop
121            @mvp Block { blockty: $crate::BlockType } => visit_block
122            @mvp Loop { blockty: $crate::BlockType } => visit_loop
123            @mvp If { blockty: $crate::BlockType } => visit_if
124            @mvp Else => visit_else
125            @exceptions Try { blockty: $crate::BlockType } => visit_try
126            @exceptions Catch { tag_index: u32 } => visit_catch
127            @exceptions Throw { tag_index: u32 } => visit_throw
128            @exceptions Rethrow { relative_depth: u32 } => visit_rethrow
129            @mvp End => visit_end
130            @mvp Br { relative_depth: u32 } => visit_br
131            @mvp BrIf { relative_depth: u32 } => visit_br_if
132            @mvp BrTable { targets: $crate::BrTable<'a> } => visit_br_table
133            @mvp Return => visit_return
134            @mvp Call { function_index: u32 } => visit_call
135            @mvp CallIndirect { type_index: u32, table_index: u32, table_byte: u8 } => visit_call_indirect
136            @tail_call ReturnCall { function_index: u32 } => visit_return_call
137            @tail_call ReturnCallIndirect { type_index: u32, table_index: u32 } => visit_return_call_indirect
138            @exceptions Delegate { relative_depth: u32 } => visit_delegate
139            @exceptions CatchAll => visit_catch_all
140            @mvp Drop => visit_drop
141            @mvp Select => visit_select
142            @reference_types TypedSelect { ty: $crate::ValType } => visit_typed_select
143            @mvp LocalGet { local_index: u32 } => visit_local_get
144            @mvp LocalSet { local_index: u32 } => visit_local_set
145            @mvp LocalTee { local_index: u32 } => visit_local_tee
146            @mvp GlobalGet { global_index: u32 } => visit_global_get
147            @mvp GlobalSet { global_index: u32 } => visit_global_set
148            @mvp I32Load { memarg: $crate::MemArg } => visit_i32_load
149            @mvp I64Load { memarg: $crate::MemArg } => visit_i64_load
150            @mvp F32Load { memarg: $crate::MemArg } => visit_f32_load
151            @mvp F64Load { memarg: $crate::MemArg } => visit_f64_load
152            @mvp I32Load8S { memarg: $crate::MemArg } => visit_i32_load8_s
153            @mvp I32Load8U { memarg: $crate::MemArg } => visit_i32_load8_u
154            @mvp I32Load16S { memarg: $crate::MemArg } => visit_i32_load16_s
155            @mvp I32Load16U { memarg: $crate::MemArg } => visit_i32_load16_u
156            @mvp I64Load8S { memarg: $crate::MemArg } => visit_i64_load8_s
157            @mvp I64Load8U { memarg: $crate::MemArg } => visit_i64_load8_u
158            @mvp I64Load16S { memarg: $crate::MemArg } => visit_i64_load16_s
159            @mvp I64Load16U { memarg: $crate::MemArg } => visit_i64_load16_u
160            @mvp I64Load32S { memarg: $crate::MemArg } => visit_i64_load32_s
161            @mvp I64Load32U { memarg: $crate::MemArg } => visit_i64_load32_u
162            @mvp I32Store { memarg: $crate::MemArg } => visit_i32_store
163            @mvp I64Store { memarg: $crate::MemArg } => visit_i64_store
164            @mvp F32Store { memarg: $crate::MemArg } => visit_f32_store
165            @mvp F64Store { memarg: $crate::MemArg } => visit_f64_store
166            @mvp I32Store8 { memarg: $crate::MemArg } => visit_i32_store8
167            @mvp I32Store16 { memarg: $crate::MemArg } => visit_i32_store16
168            @mvp I64Store8 { memarg: $crate::MemArg } => visit_i64_store8
169            @mvp I64Store16 { memarg: $crate::MemArg } => visit_i64_store16
170            @mvp I64Store32 { memarg: $crate::MemArg } => visit_i64_store32
171            @mvp MemorySize { mem: u32, mem_byte: u8 } => visit_memory_size
172            @mvp MemoryGrow { mem: u32, mem_byte: u8 } => visit_memory_grow
173            @mvp I32Const { value: i32 } => visit_i32_const
174            @mvp I64Const { value: i64 } => visit_i64_const
175            @mvp F32Const { value: $crate::Ieee32 } => visit_f32_const
176            @mvp F64Const { value: $crate::Ieee64 } => visit_f64_const
177            @reference_types RefNull { hty: $crate::HeapType } => visit_ref_null
178            @reference_types RefIsNull => visit_ref_is_null
179            @reference_types RefFunc { function_index: u32 } => visit_ref_func
180            @mvp I32Eqz => visit_i32_eqz
181            @mvp I32Eq => visit_i32_eq
182            @mvp I32Ne => visit_i32_ne
183            @mvp I32LtS => visit_i32_lt_s
184            @mvp I32LtU => visit_i32_lt_u
185            @mvp I32GtS => visit_i32_gt_s
186            @mvp I32GtU => visit_i32_gt_u
187            @mvp I32LeS => visit_i32_le_s
188            @mvp I32LeU => visit_i32_le_u
189            @mvp I32GeS => visit_i32_ge_s
190            @mvp I32GeU => visit_i32_ge_u
191            @mvp I64Eqz => visit_i64_eqz
192            @mvp I64Eq => visit_i64_eq
193            @mvp I64Ne => visit_i64_ne
194            @mvp I64LtS => visit_i64_lt_s
195            @mvp I64LtU => visit_i64_lt_u
196            @mvp I64GtS => visit_i64_gt_s
197            @mvp I64GtU => visit_i64_gt_u
198            @mvp I64LeS => visit_i64_le_s
199            @mvp I64LeU => visit_i64_le_u
200            @mvp I64GeS => visit_i64_ge_s
201            @mvp I64GeU => visit_i64_ge_u
202            @mvp F32Eq => visit_f32_eq
203            @mvp F32Ne => visit_f32_ne
204            @mvp F32Lt => visit_f32_lt
205            @mvp F32Gt => visit_f32_gt
206            @mvp F32Le => visit_f32_le
207            @mvp F32Ge => visit_f32_ge
208            @mvp F64Eq => visit_f64_eq
209            @mvp F64Ne => visit_f64_ne
210            @mvp F64Lt => visit_f64_lt
211            @mvp F64Gt => visit_f64_gt
212            @mvp F64Le => visit_f64_le
213            @mvp F64Ge => visit_f64_ge
214            @mvp I32Clz => visit_i32_clz
215            @mvp I32Ctz => visit_i32_ctz
216            @mvp I32Popcnt => visit_i32_popcnt
217            @mvp I32Add => visit_i32_add
218            @mvp I32Sub => visit_i32_sub
219            @mvp I32Mul => visit_i32_mul
220            @mvp I32DivS => visit_i32_div_s
221            @mvp I32DivU => visit_i32_div_u
222            @mvp I32RemS => visit_i32_rem_s
223            @mvp I32RemU => visit_i32_rem_u
224            @mvp I32And => visit_i32_and
225            @mvp I32Or => visit_i32_or
226            @mvp I32Xor => visit_i32_xor
227            @mvp I32Shl => visit_i32_shl
228            @mvp I32ShrS => visit_i32_shr_s
229            @mvp I32ShrU => visit_i32_shr_u
230            @mvp I32Rotl => visit_i32_rotl
231            @mvp I32Rotr => visit_i32_rotr
232            @mvp I64Clz => visit_i64_clz
233            @mvp I64Ctz => visit_i64_ctz
234            @mvp I64Popcnt => visit_i64_popcnt
235            @mvp I64Add => visit_i64_add
236            @mvp I64Sub => visit_i64_sub
237            @mvp I64Mul => visit_i64_mul
238            @mvp I64DivS => visit_i64_div_s
239            @mvp I64DivU => visit_i64_div_u
240            @mvp I64RemS => visit_i64_rem_s
241            @mvp I64RemU => visit_i64_rem_u
242            @mvp I64And => visit_i64_and
243            @mvp I64Or => visit_i64_or
244            @mvp I64Xor => visit_i64_xor
245            @mvp I64Shl => visit_i64_shl
246            @mvp I64ShrS => visit_i64_shr_s
247            @mvp I64ShrU => visit_i64_shr_u
248            @mvp I64Rotl => visit_i64_rotl
249            @mvp I64Rotr => visit_i64_rotr
250            @mvp F32Abs => visit_f32_abs
251            @mvp F32Neg => visit_f32_neg
252            @mvp F32Ceil => visit_f32_ceil
253            @mvp F32Floor => visit_f32_floor
254            @mvp F32Trunc => visit_f32_trunc
255            @mvp F32Nearest => visit_f32_nearest
256            @mvp F32Sqrt => visit_f32_sqrt
257            @mvp F32Add => visit_f32_add
258            @mvp F32Sub => visit_f32_sub
259            @mvp F32Mul => visit_f32_mul
260            @mvp F32Div => visit_f32_div
261            @mvp F32Min => visit_f32_min
262            @mvp F32Max => visit_f32_max
263            @mvp F32Copysign => visit_f32_copysign
264            @mvp F64Abs => visit_f64_abs
265            @mvp F64Neg => visit_f64_neg
266            @mvp F64Ceil => visit_f64_ceil
267            @mvp F64Floor => visit_f64_floor
268            @mvp F64Trunc => visit_f64_trunc
269            @mvp F64Nearest => visit_f64_nearest
270            @mvp F64Sqrt => visit_f64_sqrt
271            @mvp F64Add => visit_f64_add
272            @mvp F64Sub => visit_f64_sub
273            @mvp F64Mul => visit_f64_mul
274            @mvp F64Div => visit_f64_div
275            @mvp F64Min => visit_f64_min
276            @mvp F64Max => visit_f64_max
277            @mvp F64Copysign => visit_f64_copysign
278            @mvp I32WrapI64 => visit_i32_wrap_i64
279            @mvp I32TruncF32S => visit_i32_trunc_f32_s
280            @mvp I32TruncF32U => visit_i32_trunc_f32_u
281            @mvp I32TruncF64S => visit_i32_trunc_f64_s
282            @mvp I32TruncF64U => visit_i32_trunc_f64_u
283            @mvp I64ExtendI32S => visit_i64_extend_i32_s
284            @mvp I64ExtendI32U => visit_i64_extend_i32_u
285            @mvp I64TruncF32S => visit_i64_trunc_f32_s
286            @mvp I64TruncF32U => visit_i64_trunc_f32_u
287            @mvp I64TruncF64S => visit_i64_trunc_f64_s
288            @mvp I64TruncF64U => visit_i64_trunc_f64_u
289            @mvp F32ConvertI32S => visit_f32_convert_i32_s
290            @mvp F32ConvertI32U => visit_f32_convert_i32_u
291            @mvp F32ConvertI64S => visit_f32_convert_i64_s
292            @mvp F32ConvertI64U => visit_f32_convert_i64_u
293            @mvp F32DemoteF64 => visit_f32_demote_f64
294            @mvp F64ConvertI32S => visit_f64_convert_i32_s
295            @mvp F64ConvertI32U => visit_f64_convert_i32_u
296            @mvp F64ConvertI64S => visit_f64_convert_i64_s
297            @mvp F64ConvertI64U => visit_f64_convert_i64_u
298            @mvp F64PromoteF32 => visit_f64_promote_f32
299            @mvp I32ReinterpretF32 => visit_i32_reinterpret_f32
300            @mvp I64ReinterpretF64 => visit_i64_reinterpret_f64
301            @mvp F32ReinterpretI32 => visit_f32_reinterpret_i32
302            @mvp F64ReinterpretI64 => visit_f64_reinterpret_i64
303            @sign_extension I32Extend8S => visit_i32_extend8_s
304            @sign_extension I32Extend16S => visit_i32_extend16_s
305            @sign_extension I64Extend8S => visit_i64_extend8_s
306            @sign_extension I64Extend16S => visit_i64_extend16_s
307            @sign_extension I64Extend32S => visit_i64_extend32_s
308
309            // 0xFC operators
310            // Non-trapping Float-to-int Conversions
311            // https://github.com/WebAssembly/nontrapping-float-to-int-conversions
312            @saturating_float_to_int I32TruncSatF32S => visit_i32_trunc_sat_f32_s
313            @saturating_float_to_int I32TruncSatF32U => visit_i32_trunc_sat_f32_u
314            @saturating_float_to_int I32TruncSatF64S => visit_i32_trunc_sat_f64_s
315            @saturating_float_to_int I32TruncSatF64U => visit_i32_trunc_sat_f64_u
316            @saturating_float_to_int I64TruncSatF32S => visit_i64_trunc_sat_f32_s
317            @saturating_float_to_int I64TruncSatF32U => visit_i64_trunc_sat_f32_u
318            @saturating_float_to_int I64TruncSatF64S => visit_i64_trunc_sat_f64_s
319            @saturating_float_to_int I64TruncSatF64U => visit_i64_trunc_sat_f64_u
320
321            // 0xFC prefixed operators
322            // bulk memory operations
323            // https://github.com/WebAssembly/bulk-memory-operations
324            @bulk_memory MemoryInit { data_index: u32, mem: u32 } => visit_memory_init
325            @bulk_memory DataDrop { data_index: u32 } => visit_data_drop
326            @bulk_memory MemoryCopy { dst_mem: u32, src_mem: u32 } => visit_memory_copy
327            @bulk_memory MemoryFill { mem: u32 } => visit_memory_fill
328            @bulk_memory TableInit { elem_index: u32, table: u32 } => visit_table_init
329            @bulk_memory ElemDrop { elem_index: u32 } => visit_elem_drop
330            @bulk_memory TableCopy { dst_table: u32, src_table: u32 } => visit_table_copy
331
332            // 0xFC prefixed operators
333            // reference-types
334            // https://github.com/WebAssembly/reference-types
335            @reference_types TableFill { table: u32 } => visit_table_fill
336            @reference_types TableGet { table: u32 } => visit_table_get
337            @reference_types TableSet { table: u32 } => visit_table_set
338            @reference_types TableGrow { table: u32 } => visit_table_grow
339            @reference_types TableSize { table: u32 } => visit_table_size
340
341            // OxFC prefixed operators
342            // memory control (experimental)
343            // https://github.com/WebAssembly/design/issues/1439
344            @memory_control MemoryDiscard { mem: u32 } => visit_memory_discard
345
346            // 0xFE prefixed operators
347            // threads
348            // https://github.com/WebAssembly/threads
349            @threads MemoryAtomicNotify { memarg: $crate::MemArg } => visit_memory_atomic_notify
350            @threads MemoryAtomicWait32 { memarg: $crate::MemArg } => visit_memory_atomic_wait32
351            @threads MemoryAtomicWait64 { memarg: $crate::MemArg } => visit_memory_atomic_wait64
352            @threads AtomicFence => visit_atomic_fence
353            @threads I32AtomicLoad { memarg: $crate::MemArg } => visit_i32_atomic_load
354            @threads I64AtomicLoad { memarg: $crate::MemArg } => visit_i64_atomic_load
355            @threads I32AtomicLoad8U { memarg: $crate::MemArg } => visit_i32_atomic_load8_u
356            @threads I32AtomicLoad16U { memarg: $crate::MemArg } => visit_i32_atomic_load16_u
357            @threads I64AtomicLoad8U { memarg: $crate::MemArg } => visit_i64_atomic_load8_u
358            @threads I64AtomicLoad16U { memarg: $crate::MemArg } => visit_i64_atomic_load16_u
359            @threads I64AtomicLoad32U { memarg: $crate::MemArg } => visit_i64_atomic_load32_u
360            @threads I32AtomicStore { memarg: $crate::MemArg } => visit_i32_atomic_store
361            @threads I64AtomicStore { memarg: $crate::MemArg } => visit_i64_atomic_store
362            @threads I32AtomicStore8 { memarg: $crate::MemArg } => visit_i32_atomic_store8
363            @threads I32AtomicStore16 { memarg: $crate::MemArg } => visit_i32_atomic_store16
364            @threads I64AtomicStore8 { memarg: $crate::MemArg } => visit_i64_atomic_store8
365            @threads I64AtomicStore16 { memarg: $crate::MemArg } => visit_i64_atomic_store16
366            @threads I64AtomicStore32 { memarg: $crate::MemArg } => visit_i64_atomic_store32
367            @threads I32AtomicRmwAdd { memarg: $crate::MemArg } => visit_i32_atomic_rmw_add
368            @threads I64AtomicRmwAdd { memarg: $crate::MemArg } => visit_i64_atomic_rmw_add
369            @threads I32AtomicRmw8AddU { memarg: $crate::MemArg } => visit_i32_atomic_rmw8_add_u
370            @threads I32AtomicRmw16AddU { memarg: $crate::MemArg } => visit_i32_atomic_rmw16_add_u
371            @threads I64AtomicRmw8AddU { memarg: $crate::MemArg } => visit_i64_atomic_rmw8_add_u
372            @threads I64AtomicRmw16AddU { memarg: $crate::MemArg } => visit_i64_atomic_rmw16_add_u
373            @threads I64AtomicRmw32AddU { memarg: $crate::MemArg } => visit_i64_atomic_rmw32_add_u
374            @threads I32AtomicRmwSub { memarg: $crate::MemArg } => visit_i32_atomic_rmw_sub
375            @threads I64AtomicRmwSub { memarg: $crate::MemArg } => visit_i64_atomic_rmw_sub
376            @threads I32AtomicRmw8SubU { memarg: $crate::MemArg } => visit_i32_atomic_rmw8_sub_u
377            @threads I32AtomicRmw16SubU { memarg: $crate::MemArg } => visit_i32_atomic_rmw16_sub_u
378            @threads I64AtomicRmw8SubU { memarg: $crate::MemArg } => visit_i64_atomic_rmw8_sub_u
379            @threads I64AtomicRmw16SubU { memarg: $crate::MemArg } => visit_i64_atomic_rmw16_sub_u
380            @threads I64AtomicRmw32SubU { memarg: $crate::MemArg } => visit_i64_atomic_rmw32_sub_u
381            @threads I32AtomicRmwAnd { memarg: $crate::MemArg } => visit_i32_atomic_rmw_and
382            @threads I64AtomicRmwAnd { memarg: $crate::MemArg } => visit_i64_atomic_rmw_and
383            @threads I32AtomicRmw8AndU { memarg: $crate::MemArg } => visit_i32_atomic_rmw8_and_u
384            @threads I32AtomicRmw16AndU { memarg: $crate::MemArg } => visit_i32_atomic_rmw16_and_u
385            @threads I64AtomicRmw8AndU { memarg: $crate::MemArg } => visit_i64_atomic_rmw8_and_u
386            @threads I64AtomicRmw16AndU { memarg: $crate::MemArg } => visit_i64_atomic_rmw16_and_u
387            @threads I64AtomicRmw32AndU { memarg: $crate::MemArg } => visit_i64_atomic_rmw32_and_u
388            @threads I32AtomicRmwOr { memarg: $crate::MemArg } => visit_i32_atomic_rmw_or
389            @threads I64AtomicRmwOr { memarg: $crate::MemArg } => visit_i64_atomic_rmw_or
390            @threads I32AtomicRmw8OrU { memarg: $crate::MemArg } => visit_i32_atomic_rmw8_or_u
391            @threads I32AtomicRmw16OrU { memarg: $crate::MemArg } => visit_i32_atomic_rmw16_or_u
392            @threads I64AtomicRmw8OrU { memarg: $crate::MemArg } => visit_i64_atomic_rmw8_or_u
393            @threads I64AtomicRmw16OrU { memarg: $crate::MemArg } => visit_i64_atomic_rmw16_or_u
394            @threads I64AtomicRmw32OrU { memarg: $crate::MemArg } => visit_i64_atomic_rmw32_or_u
395            @threads I32AtomicRmwXor { memarg: $crate::MemArg } => visit_i32_atomic_rmw_xor
396            @threads I64AtomicRmwXor { memarg: $crate::MemArg } => visit_i64_atomic_rmw_xor
397            @threads I32AtomicRmw8XorU { memarg: $crate::MemArg } => visit_i32_atomic_rmw8_xor_u
398            @threads I32AtomicRmw16XorU { memarg: $crate::MemArg } => visit_i32_atomic_rmw16_xor_u
399            @threads I64AtomicRmw8XorU { memarg: $crate::MemArg } => visit_i64_atomic_rmw8_xor_u
400            @threads I64AtomicRmw16XorU { memarg: $crate::MemArg } => visit_i64_atomic_rmw16_xor_u
401            @threads I64AtomicRmw32XorU { memarg: $crate::MemArg } => visit_i64_atomic_rmw32_xor_u
402            @threads I32AtomicRmwXchg { memarg: $crate::MemArg } => visit_i32_atomic_rmw_xchg
403            @threads I64AtomicRmwXchg { memarg: $crate::MemArg } => visit_i64_atomic_rmw_xchg
404            @threads I32AtomicRmw8XchgU { memarg: $crate::MemArg } => visit_i32_atomic_rmw8_xchg_u
405            @threads I32AtomicRmw16XchgU { memarg: $crate::MemArg } => visit_i32_atomic_rmw16_xchg_u
406            @threads I64AtomicRmw8XchgU { memarg: $crate::MemArg } => visit_i64_atomic_rmw8_xchg_u
407            @threads I64AtomicRmw16XchgU { memarg: $crate::MemArg } => visit_i64_atomic_rmw16_xchg_u
408            @threads I64AtomicRmw32XchgU { memarg: $crate::MemArg } => visit_i64_atomic_rmw32_xchg_u
409            @threads I32AtomicRmwCmpxchg { memarg: $crate::MemArg } => visit_i32_atomic_rmw_cmpxchg
410            @threads I64AtomicRmwCmpxchg { memarg: $crate::MemArg } => visit_i64_atomic_rmw_cmpxchg
411            @threads I32AtomicRmw8CmpxchgU { memarg: $crate::MemArg } => visit_i32_atomic_rmw8_cmpxchg_u
412            @threads I32AtomicRmw16CmpxchgU { memarg: $crate::MemArg } => visit_i32_atomic_rmw16_cmpxchg_u
413            @threads I64AtomicRmw8CmpxchgU { memarg: $crate::MemArg } => visit_i64_atomic_rmw8_cmpxchg_u
414            @threads I64AtomicRmw16CmpxchgU { memarg: $crate::MemArg } => visit_i64_atomic_rmw16_cmpxchg_u
415            @threads I64AtomicRmw32CmpxchgU { memarg: $crate::MemArg } => visit_i64_atomic_rmw32_cmpxchg_u
416
417            // 0xFD operators
418            // 128-bit SIMD
419            // - https://github.com/webassembly/simd
420            // - https://webassembly.github.io/simd/core/binary/instructions.html
421            @simd V128Load { memarg: $crate::MemArg } => visit_v128_load
422            @simd V128Load8x8S { memarg: $crate::MemArg } => visit_v128_load8x8_s
423            @simd V128Load8x8U { memarg: $crate::MemArg } => visit_v128_load8x8_u
424            @simd V128Load16x4S { memarg: $crate::MemArg } => visit_v128_load16x4_s
425            @simd V128Load16x4U { memarg: $crate::MemArg } => visit_v128_load16x4_u
426            @simd V128Load32x2S { memarg: $crate::MemArg } => visit_v128_load32x2_s
427            @simd V128Load32x2U { memarg: $crate::MemArg } => visit_v128_load32x2_u
428            @simd V128Load8Splat { memarg: $crate::MemArg } => visit_v128_load8_splat
429            @simd V128Load16Splat { memarg: $crate::MemArg } => visit_v128_load16_splat
430            @simd V128Load32Splat { memarg: $crate::MemArg } => visit_v128_load32_splat
431            @simd V128Load64Splat { memarg: $crate::MemArg } => visit_v128_load64_splat
432            @simd V128Load32Zero { memarg: $crate::MemArg } => visit_v128_load32_zero
433            @simd V128Load64Zero { memarg: $crate::MemArg } => visit_v128_load64_zero
434            @simd V128Store { memarg: $crate::MemArg } => visit_v128_store
435            @simd V128Load8Lane { memarg: $crate::MemArg, lane: u8 } => visit_v128_load8_lane
436            @simd V128Load16Lane { memarg: $crate::MemArg, lane: u8 } => visit_v128_load16_lane
437            @simd V128Load32Lane { memarg: $crate::MemArg, lane: u8 } => visit_v128_load32_lane
438            @simd V128Load64Lane { memarg: $crate::MemArg, lane: u8 } => visit_v128_load64_lane
439            @simd V128Store8Lane { memarg: $crate::MemArg, lane: u8 } => visit_v128_store8_lane
440            @simd V128Store16Lane { memarg: $crate::MemArg, lane: u8 } => visit_v128_store16_lane
441            @simd V128Store32Lane { memarg: $crate::MemArg, lane: u8 } => visit_v128_store32_lane
442            @simd V128Store64Lane { memarg: $crate::MemArg, lane: u8 } => visit_v128_store64_lane
443            @simd V128Const { value: $crate::V128 } => visit_v128_const
444            @simd I8x16Shuffle { lanes: [u8; 16] } => visit_i8x16_shuffle
445            @simd I8x16ExtractLaneS { lane: u8 } => visit_i8x16_extract_lane_s
446            @simd I8x16ExtractLaneU { lane: u8 } => visit_i8x16_extract_lane_u
447            @simd I8x16ReplaceLane { lane: u8 } => visit_i8x16_replace_lane
448            @simd I16x8ExtractLaneS { lane: u8 } => visit_i16x8_extract_lane_s
449            @simd I16x8ExtractLaneU { lane: u8 } => visit_i16x8_extract_lane_u
450            @simd I16x8ReplaceLane { lane: u8 } => visit_i16x8_replace_lane
451            @simd I32x4ExtractLane { lane: u8 } => visit_i32x4_extract_lane
452            @simd I32x4ReplaceLane { lane: u8 } => visit_i32x4_replace_lane
453            @simd I64x2ExtractLane { lane: u8 } => visit_i64x2_extract_lane
454            @simd I64x2ReplaceLane { lane: u8 } => visit_i64x2_replace_lane
455            @simd F32x4ExtractLane { lane: u8 } => visit_f32x4_extract_lane
456            @simd F32x4ReplaceLane { lane: u8 } => visit_f32x4_replace_lane
457            @simd F64x2ExtractLane { lane: u8 } => visit_f64x2_extract_lane
458            @simd F64x2ReplaceLane { lane: u8 } => visit_f64x2_replace_lane
459            @simd I8x16Swizzle => visit_i8x16_swizzle
460            @simd I8x16Splat => visit_i8x16_splat
461            @simd I16x8Splat => visit_i16x8_splat
462            @simd I32x4Splat => visit_i32x4_splat
463            @simd I64x2Splat => visit_i64x2_splat
464            @simd F32x4Splat => visit_f32x4_splat
465            @simd F64x2Splat => visit_f64x2_splat
466            @simd I8x16Eq => visit_i8x16_eq
467            @simd I8x16Ne => visit_i8x16_ne
468            @simd I8x16LtS => visit_i8x16_lt_s
469            @simd I8x16LtU => visit_i8x16_lt_u
470            @simd I8x16GtS => visit_i8x16_gt_s
471            @simd I8x16GtU => visit_i8x16_gt_u
472            @simd I8x16LeS => visit_i8x16_le_s
473            @simd I8x16LeU => visit_i8x16_le_u
474            @simd I8x16GeS => visit_i8x16_ge_s
475            @simd I8x16GeU => visit_i8x16_ge_u
476            @simd I16x8Eq => visit_i16x8_eq
477            @simd I16x8Ne => visit_i16x8_ne
478            @simd I16x8LtS => visit_i16x8_lt_s
479            @simd I16x8LtU => visit_i16x8_lt_u
480            @simd I16x8GtS => visit_i16x8_gt_s
481            @simd I16x8GtU => visit_i16x8_gt_u
482            @simd I16x8LeS => visit_i16x8_le_s
483            @simd I16x8LeU => visit_i16x8_le_u
484            @simd I16x8GeS => visit_i16x8_ge_s
485            @simd I16x8GeU => visit_i16x8_ge_u
486            @simd I32x4Eq => visit_i32x4_eq
487            @simd I32x4Ne => visit_i32x4_ne
488            @simd I32x4LtS => visit_i32x4_lt_s
489            @simd I32x4LtU => visit_i32x4_lt_u
490            @simd I32x4GtS => visit_i32x4_gt_s
491            @simd I32x4GtU => visit_i32x4_gt_u
492            @simd I32x4LeS => visit_i32x4_le_s
493            @simd I32x4LeU => visit_i32x4_le_u
494            @simd I32x4GeS => visit_i32x4_ge_s
495            @simd I32x4GeU => visit_i32x4_ge_u
496            @simd I64x2Eq => visit_i64x2_eq
497            @simd I64x2Ne => visit_i64x2_ne
498            @simd I64x2LtS => visit_i64x2_lt_s
499            @simd I64x2GtS => visit_i64x2_gt_s
500            @simd I64x2LeS => visit_i64x2_le_s
501            @simd I64x2GeS => visit_i64x2_ge_s
502            @simd F32x4Eq => visit_f32x4_eq
503            @simd F32x4Ne => visit_f32x4_ne
504            @simd F32x4Lt => visit_f32x4_lt
505            @simd F32x4Gt => visit_f32x4_gt
506            @simd F32x4Le => visit_f32x4_le
507            @simd F32x4Ge => visit_f32x4_ge
508            @simd F64x2Eq => visit_f64x2_eq
509            @simd F64x2Ne => visit_f64x2_ne
510            @simd F64x2Lt => visit_f64x2_lt
511            @simd F64x2Gt => visit_f64x2_gt
512            @simd F64x2Le => visit_f64x2_le
513            @simd F64x2Ge => visit_f64x2_ge
514            @simd V128Not => visit_v128_not
515            @simd V128And => visit_v128_and
516            @simd V128AndNot => visit_v128_andnot
517            @simd V128Or => visit_v128_or
518            @simd V128Xor => visit_v128_xor
519            @simd V128Bitselect => visit_v128_bitselect
520            @simd V128AnyTrue => visit_v128_any_true
521            @simd I8x16Abs => visit_i8x16_abs
522            @simd I8x16Neg => visit_i8x16_neg
523            @simd I8x16Popcnt => visit_i8x16_popcnt
524            @simd I8x16AllTrue => visit_i8x16_all_true
525            @simd I8x16Bitmask => visit_i8x16_bitmask
526            @simd I8x16NarrowI16x8S => visit_i8x16_narrow_i16x8_s
527            @simd I8x16NarrowI16x8U => visit_i8x16_narrow_i16x8_u
528            @simd I8x16Shl => visit_i8x16_shl
529            @simd I8x16ShrS => visit_i8x16_shr_s
530            @simd I8x16ShrU => visit_i8x16_shr_u
531            @simd I8x16Add => visit_i8x16_add
532            @simd I8x16AddSatS => visit_i8x16_add_sat_s
533            @simd I8x16AddSatU => visit_i8x16_add_sat_u
534            @simd I8x16Sub => visit_i8x16_sub
535            @simd I8x16SubSatS => visit_i8x16_sub_sat_s
536            @simd I8x16SubSatU => visit_i8x16_sub_sat_u
537            @simd I8x16MinS => visit_i8x16_min_s
538            @simd I8x16MinU => visit_i8x16_min_u
539            @simd I8x16MaxS => visit_i8x16_max_s
540            @simd I8x16MaxU => visit_i8x16_max_u
541            @simd I8x16AvgrU => visit_i8x16_avgr_u
542            @simd I16x8ExtAddPairwiseI8x16S => visit_i16x8_extadd_pairwise_i8x16_s
543            @simd I16x8ExtAddPairwiseI8x16U => visit_i16x8_extadd_pairwise_i8x16_u
544            @simd I16x8Abs => visit_i16x8_abs
545            @simd I16x8Neg => visit_i16x8_neg
546            @simd I16x8Q15MulrSatS => visit_i16x8_q15mulr_sat_s
547            @simd I16x8AllTrue => visit_i16x8_all_true
548            @simd I16x8Bitmask => visit_i16x8_bitmask
549            @simd I16x8NarrowI32x4S => visit_i16x8_narrow_i32x4_s
550            @simd I16x8NarrowI32x4U => visit_i16x8_narrow_i32x4_u
551            @simd I16x8ExtendLowI8x16S => visit_i16x8_extend_low_i8x16_s
552            @simd I16x8ExtendHighI8x16S => visit_i16x8_extend_high_i8x16_s
553            @simd I16x8ExtendLowI8x16U => visit_i16x8_extend_low_i8x16_u
554            @simd I16x8ExtendHighI8x16U => visit_i16x8_extend_high_i8x16_u
555            @simd I16x8Shl => visit_i16x8_shl
556            @simd I16x8ShrS => visit_i16x8_shr_s
557            @simd I16x8ShrU => visit_i16x8_shr_u
558            @simd I16x8Add => visit_i16x8_add
559            @simd I16x8AddSatS => visit_i16x8_add_sat_s
560            @simd I16x8AddSatU => visit_i16x8_add_sat_u
561            @simd I16x8Sub => visit_i16x8_sub
562            @simd I16x8SubSatS => visit_i16x8_sub_sat_s
563            @simd I16x8SubSatU => visit_i16x8_sub_sat_u
564            @simd I16x8Mul => visit_i16x8_mul
565            @simd I16x8MinS => visit_i16x8_min_s
566            @simd I16x8MinU => visit_i16x8_min_u
567            @simd I16x8MaxS => visit_i16x8_max_s
568            @simd I16x8MaxU => visit_i16x8_max_u
569            @simd I16x8AvgrU => visit_i16x8_avgr_u
570            @simd I16x8ExtMulLowI8x16S => visit_i16x8_extmul_low_i8x16_s
571            @simd I16x8ExtMulHighI8x16S => visit_i16x8_extmul_high_i8x16_s
572            @simd I16x8ExtMulLowI8x16U => visit_i16x8_extmul_low_i8x16_u
573            @simd I16x8ExtMulHighI8x16U => visit_i16x8_extmul_high_i8x16_u
574            @simd I32x4ExtAddPairwiseI16x8S => visit_i32x4_extadd_pairwise_i16x8_s
575            @simd I32x4ExtAddPairwiseI16x8U => visit_i32x4_extadd_pairwise_i16x8_u
576            @simd I32x4Abs => visit_i32x4_abs
577            @simd I32x4Neg => visit_i32x4_neg
578            @simd I32x4AllTrue => visit_i32x4_all_true
579            @simd I32x4Bitmask => visit_i32x4_bitmask
580            @simd I32x4ExtendLowI16x8S => visit_i32x4_extend_low_i16x8_s
581            @simd I32x4ExtendHighI16x8S => visit_i32x4_extend_high_i16x8_s
582            @simd I32x4ExtendLowI16x8U => visit_i32x4_extend_low_i16x8_u
583            @simd I32x4ExtendHighI16x8U => visit_i32x4_extend_high_i16x8_u
584            @simd I32x4Shl => visit_i32x4_shl
585            @simd I32x4ShrS => visit_i32x4_shr_s
586            @simd I32x4ShrU => visit_i32x4_shr_u
587            @simd I32x4Add => visit_i32x4_add
588            @simd I32x4Sub => visit_i32x4_sub
589            @simd I32x4Mul => visit_i32x4_mul
590            @simd I32x4MinS => visit_i32x4_min_s
591            @simd I32x4MinU => visit_i32x4_min_u
592            @simd I32x4MaxS => visit_i32x4_max_s
593            @simd I32x4MaxU => visit_i32x4_max_u
594            @simd I32x4DotI16x8S => visit_i32x4_dot_i16x8_s
595            @simd I32x4ExtMulLowI16x8S => visit_i32x4_extmul_low_i16x8_s
596            @simd I32x4ExtMulHighI16x8S => visit_i32x4_extmul_high_i16x8_s
597            @simd I32x4ExtMulLowI16x8U => visit_i32x4_extmul_low_i16x8_u
598            @simd I32x4ExtMulHighI16x8U => visit_i32x4_extmul_high_i16x8_u
599            @simd I64x2Abs => visit_i64x2_abs
600            @simd I64x2Neg => visit_i64x2_neg
601            @simd I64x2AllTrue => visit_i64x2_all_true
602            @simd I64x2Bitmask => visit_i64x2_bitmask
603            @simd I64x2ExtendLowI32x4S => visit_i64x2_extend_low_i32x4_s
604            @simd I64x2ExtendHighI32x4S => visit_i64x2_extend_high_i32x4_s
605            @simd I64x2ExtendLowI32x4U => visit_i64x2_extend_low_i32x4_u
606            @simd I64x2ExtendHighI32x4U => visit_i64x2_extend_high_i32x4_u
607            @simd I64x2Shl => visit_i64x2_shl
608            @simd I64x2ShrS => visit_i64x2_shr_s
609            @simd I64x2ShrU => visit_i64x2_shr_u
610            @simd I64x2Add => visit_i64x2_add
611            @simd I64x2Sub => visit_i64x2_sub
612            @simd I64x2Mul => visit_i64x2_mul
613            @simd I64x2ExtMulLowI32x4S => visit_i64x2_extmul_low_i32x4_s
614            @simd I64x2ExtMulHighI32x4S => visit_i64x2_extmul_high_i32x4_s
615            @simd I64x2ExtMulLowI32x4U => visit_i64x2_extmul_low_i32x4_u
616            @simd I64x2ExtMulHighI32x4U => visit_i64x2_extmul_high_i32x4_u
617            @simd F32x4Ceil => visit_f32x4_ceil
618            @simd F32x4Floor => visit_f32x4_floor
619            @simd F32x4Trunc => visit_f32x4_trunc
620            @simd F32x4Nearest => visit_f32x4_nearest
621            @simd F32x4Abs => visit_f32x4_abs
622            @simd F32x4Neg => visit_f32x4_neg
623            @simd F32x4Sqrt => visit_f32x4_sqrt
624            @simd F32x4Add => visit_f32x4_add
625            @simd F32x4Sub => visit_f32x4_sub
626            @simd F32x4Mul => visit_f32x4_mul
627            @simd F32x4Div => visit_f32x4_div
628            @simd F32x4Min => visit_f32x4_min
629            @simd F32x4Max => visit_f32x4_max
630            @simd F32x4PMin => visit_f32x4_pmin
631            @simd F32x4PMax => visit_f32x4_pmax
632            @simd F64x2Ceil => visit_f64x2_ceil
633            @simd F64x2Floor => visit_f64x2_floor
634            @simd F64x2Trunc => visit_f64x2_trunc
635            @simd F64x2Nearest => visit_f64x2_nearest
636            @simd F64x2Abs => visit_f64x2_abs
637            @simd F64x2Neg => visit_f64x2_neg
638            @simd F64x2Sqrt => visit_f64x2_sqrt
639            @simd F64x2Add => visit_f64x2_add
640            @simd F64x2Sub => visit_f64x2_sub
641            @simd F64x2Mul => visit_f64x2_mul
642            @simd F64x2Div => visit_f64x2_div
643            @simd F64x2Min => visit_f64x2_min
644            @simd F64x2Max => visit_f64x2_max
645            @simd F64x2PMin => visit_f64x2_pmin
646            @simd F64x2PMax => visit_f64x2_pmax
647            @simd I32x4TruncSatF32x4S => visit_i32x4_trunc_sat_f32x4_s
648            @simd I32x4TruncSatF32x4U => visit_i32x4_trunc_sat_f32x4_u
649            @simd F32x4ConvertI32x4S => visit_f32x4_convert_i32x4_s
650            @simd F32x4ConvertI32x4U => visit_f32x4_convert_i32x4_u
651            @simd I32x4TruncSatF64x2SZero => visit_i32x4_trunc_sat_f64x2_s_zero
652            @simd I32x4TruncSatF64x2UZero => visit_i32x4_trunc_sat_f64x2_u_zero
653            @simd F64x2ConvertLowI32x4S => visit_f64x2_convert_low_i32x4_s
654            @simd F64x2ConvertLowI32x4U => visit_f64x2_convert_low_i32x4_u
655            @simd F32x4DemoteF64x2Zero => visit_f32x4_demote_f64x2_zero
656            @simd F64x2PromoteLowF32x4 => visit_f64x2_promote_low_f32x4
657
658            // Relaxed SIMD operators
659            // https://github.com/WebAssembly/relaxed-simd
660            @relaxed_simd I8x16RelaxedSwizzle => visit_i8x16_relaxed_swizzle
661            @relaxed_simd I32x4RelaxedTruncF32x4S => visit_i32x4_relaxed_trunc_f32x4_s
662            @relaxed_simd I32x4RelaxedTruncF32x4U => visit_i32x4_relaxed_trunc_f32x4_u
663            @relaxed_simd I32x4RelaxedTruncF64x2SZero => visit_i32x4_relaxed_trunc_f64x2_s_zero
664            @relaxed_simd I32x4RelaxedTruncF64x2UZero => visit_i32x4_relaxed_trunc_f64x2_u_zero
665            @relaxed_simd F32x4RelaxedMadd => visit_f32x4_relaxed_madd
666            @relaxed_simd F32x4RelaxedNmadd => visit_f32x4_relaxed_nmadd
667            @relaxed_simd F64x2RelaxedMadd => visit_f64x2_relaxed_madd
668            @relaxed_simd F64x2RelaxedNmadd => visit_f64x2_relaxed_nmadd
669            @relaxed_simd I8x16RelaxedLaneselect => visit_i8x16_relaxed_laneselect
670            @relaxed_simd I16x8RelaxedLaneselect => visit_i16x8_relaxed_laneselect
671            @relaxed_simd I32x4RelaxedLaneselect => visit_i32x4_relaxed_laneselect
672            @relaxed_simd I64x2RelaxedLaneselect => visit_i64x2_relaxed_laneselect
673            @relaxed_simd F32x4RelaxedMin => visit_f32x4_relaxed_min
674            @relaxed_simd F32x4RelaxedMax => visit_f32x4_relaxed_max
675            @relaxed_simd F64x2RelaxedMin => visit_f64x2_relaxed_min
676            @relaxed_simd F64x2RelaxedMax => visit_f64x2_relaxed_max
677            @relaxed_simd I16x8RelaxedQ15mulrS => visit_i16x8_relaxed_q15mulr_s
678            @relaxed_simd I16x8RelaxedDotI8x16I7x16S => visit_i16x8_relaxed_dot_i8x16_i7x16_s
679            @relaxed_simd I32x4RelaxedDotI8x16I7x16AddS => visit_i32x4_relaxed_dot_i8x16_i7x16_add_s
680
681            // Typed Function references
682            @function_references CallRef { hty: $crate::HeapType } => visit_call_ref
683            @function_references ReturnCallRef { hty: $crate::HeapType } => visit_return_call_ref
684            @function_references RefAsNonNull => visit_ref_as_non_null
685            @function_references BrOnNull { relative_depth: u32 } => visit_br_on_null
686            @function_references BrOnNonNull { relative_depth: u32 } => visit_br_on_non_null
687        }
688    };
689}
690
691macro_rules! format_err {
692    ($offset:expr, $($arg:tt)*) => {
693        crate::BinaryReaderError::fmt(format_args!($($arg)*), $offset)
694    }
695}
696
697macro_rules! bail {
698    ($($arg:tt)*) => {return Err(format_err!($($arg)*))}
699}
700
701pub use crate::binary_reader::{BinaryReader, BinaryReaderError, Result};
702pub use crate::parser::*;
703pub use crate::readers::*;
704pub use crate::resources::*;
705pub use crate::validator::*;
706
707mod binary_reader;
708mod limits;
709mod parser;
710mod readers;
711mod resources;
712mod validator;